Atomic Layer Deposition of Al{sub}2O{sub}3/NiO/Al{sub}2O{sub}3 Laminate Structures for Nonvolatile Memory Device Applications

摘要

We have fabricated Al{sub}2O{sub}3/NiO/Al{sub}2O{sub}3 nano-laminate structures on Si(001) substrate using atomic layer deposition (ALD) technique for floating gate memory application. The nonvolatile capacitance-voltage (C-V) characterisitics have been investigated. NiO and Al{sub}2O{sub}3 films, as charge trapping and insulating barrier layer, were deposited using newly-synthesized Ni aminoalkoxide (Ni(dmamb){sub}2) and trimethylaluminum (TMA) with H{sub}2O, respectively. The hysteresis voltage window of the Al{sub}2O{sub}3 (20nm)/NiO (5 nm)/Al{sub}2O{sub}3 (5 nm) laminate structure is ～8.6 V in voltage sweep range from -7.5 to 7.5 V, while there is no hysteresis in the Al{sub}2O{sub}3 film.