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Analysis of Higfa-Q On-Chip Inductors Realized by Wafer-Level Packaging Techniques

机译:晶圆级包装技术实现的HIGFA-Q片电感器分析

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Thin-film Wafer-Level Packaging (WLP) techniques have been used to realise high-Q on-chip inductors on 20Ohm.cm Si wafers. The electromagnetic analysis has been completed using the 3-D field simulator HFSS. A very good agreement has been obtained between the experiments and simulations. Further simulations have been performed to investigate the influence of the Cu and dielectric thickness, substrate-material, etc., which may be used as guidelines for further performance improvement.
机译:薄膜晶片级包装(WLP)技术已被用于在20Ohm.cm Si晶片上实现高Q片电感器。使用3-D场模拟器HFSS完成了电磁分析。在实验和模拟之间获得了非常好的一致性。已经进行了进一步的模拟以研究Cu和介电厚度,衬底材料等的影响,其可以用作进一步性能改进的指导。

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