The influence of the interface trap densites on the extraction of the silicon film and front oxide thickness of SOI nmos devices at low temperatures

摘要

Interface trap densities can have a strong influence on the electrical performance of MOS devices, mainly at low temperatures. This work presents a technique to extract the silicon film and front oxide thickness on fully depleted SOI nMOSFETs considering the influence of this parameter at low temperatures. The proposed technique exploits the influence of the front/back gate voltages on the back/front channel current regime respectively. Bidimensional numerical simulations were used to support the analysis.