Optimisation of dielectric anti-reflective coatings on a transparent substrate in sub-half-micron CMOS technology

摘要

The optimization of a dielectric anti-reflective coating (ARC) on a transparent substrate with significant topography is described. Supporting theory is provided and although it is not possible to obtain the ultimate performance of an ARC over planar film stacks and flat substrates, the critical dimension (CD) swing ratio is greatly reduced and a manufactureable solution achieved using response surface modeling (RSM) in combination with data generated form the lithography simulation tool, PROLITH/2.