The effect of wells on gate oxide charging during plasma processing

摘要

The effect of wells and substrate type on gate oxide charging during Plasma Immersion Ion Implantation is modeled. The simulation combines the equations governing the plasma currents and integrated circuit device models to determine the gate oxide stressing voltage during implantation. Depending on the substrate type and the surface potential (V/sub s/), a depletion region may exist, reducing the gate oxide voltage, and hence the gate oxide damage. This occurs for a P-substrate with a positive V/sub s/ and for an N-substrate with a negative V/sub s/. Well structures by the nature of their capacitance, modulate V/sub s/, altering the oxide stressing voltage. P-wells result in a more positive V/sub ox/, while N-wells result in a more negative V/sub ox/. Experimental results confirm the substrate effect, while they are inconclusive on the effect of wells. Including both the substrate and well effects results in a more complete picture of oxide charging.