A high-speed GaAs 16 Kb SRAM of 4.4 ns/2 W using triple-level metalinterconnection

摘要

A fully functional GaAs 16 K SRAM is realized with an addressaccess time of 4.4 ns and a power dissipation of 2 W. In the fabricationprocess, a triple-level Au-based interconnection technology is developedto reduce the wiring length, which strongly affects the delay time. Thewiring length and chip size are drastically reduced to 69% and 58% ofthose previously reported by the authors, respectively. High wafer yieldof 10% is also obtained by using this technology. Moreover, high-speedand stable operation of less than 5 ns is achieved for the temperaturerange from 25 to 100° C