A high-speed GaAs 16 Kb SRAM of 4.4 ns/2 W using triple-level metal interconnection

摘要

A fully functional GaAs 16 K SRAM is realized with an address access time of 4.4 ns and a power dissipation of 2 W. In the fabrication process, a triple-level Au-based interconnection technology is developed to reduce the wiring length, which strongly affects the delay time. The wiring length and chip size are drastically reduced to 69% and 58% of those previously reported by the authors, respectively. High wafer yield of 10% is also obtained by using this technology. Moreover, high-speed and stable operation of less than 5 ns is achieved for the temperature range from 25 to 100 degrees C.