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Low contact-resistance metallization process for a nickel self-aligned contact of beyond 65nm node CMOS

机译:低接触电阻金属化工艺,用于超出65nm节点CMOS的镍自对准接触

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We address contact plug structure with low resistance applicable to NiSi system. It consists of thin barrier layer, prepared by NH3 plasma nitrization of PE-TiCl4 CVD Ti (PE-TiN/Ti) at process temperature of 450°C, and W-plug with B2H6 based nucleation layer. This process enables us to reduce contact resistance down to 50% without “volcano” type defect issues due to WF6 attacking.
机译:我们地址具有适用于NISI系统的低电阻的接触插件结构。它由薄阻挡层组成,由NH 3 CVD TI(PE-TIN / TI)在450°C的过程温度下制备的粒子氮化, W-POLD with B 2 H 6 基于成核层。这一过程使我们能够将接触阻力降低到50%,而没有“火山”型缺陷问题由于WF 6 攻击。

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