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Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

机译:基于垂直堆叠的水平Si纳米线的全栅MOSFET在块状Si衬底上的替代金属栅工艺中

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We report on gate-all-around (GAA) n- and p-MOSFETs made of 8-nm-diameter vertically stacked horizontal Si nanowires (NWs). We show that these devices, which were fabricated on bulk Si substrates using an industry-relevant replacement metal gate (RMG) process, have excellent short-channel characteristics (SS = 65 mV/dec, DIBL = 42 mV/V for LG = 24 nm) at performance levels comparable to finFET reference devices. The parasitic channels below the Si NWs were effectively suppressed by ground plane (GP) engineering.
机译:我们报告了由8纳米直径垂直堆叠的水平Si纳米线(NWs)制成的全栅(GAA)n和p-MOSFET。我们表明,这些器件是使用行业相关的替代金属栅极(RMG)工艺在块状Si衬底上制造的,具有出色的短沟道特性(对于LG = 24,SS = 65 mV / dec,DIBL = 42 mV / V)。的性能水平可与finFET参考器件相媲美。 Si NWs下方的寄生沟道已通过接地平面(GP)工程得到了有效抑制。

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