首页> 外文会议>2010 IEEE International Electron Devices Meeting >180nm gate length amorphous InGaZnO thin film transistor for high density image sensor applications
【24h】

180nm gate length amorphous InGaZnO thin film transistor for high density image sensor applications

机译:适用于高密度图像传感器应用的180nm栅极长度非晶InGaZnO薄膜晶体管

获取原文

摘要

In this article, we propose a novel hybrid complementary metal oxide semiconductor (CMOS) image sensor architecture utilizing nanometer scale amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFT) combined with a conventional Si photo diode. This approach will overcome the loss of quantum efficiency and image quality due to the downscaling of the photodiode. The 180nm gate length a-IGZO TFT exhibits remarkable short channel device performance including a low 1/ƒ noise and a high output gain, despite fabrication temperatures as low as 200°C. The excellent device performance has been achieved by a double layer gate dielectric (Al2O3/SiO2) and a trapezoidal active region formed by a tailored etching process. A self aligned top gate structure was employed for low parasitic capacitance. 3D process simulation tools were applied to optimize a four pixel CMOS image sensor structure. The results demonstrate how our stacked hybrid device approach contributes to new device strategies in image sensor architectures. We expect that this approach is applicable to numerous devices and systems in future micro- and nano-electronics.
机译:在本文中,我们提出了一种新颖的混合互补金属氧化物半导体(CMOS)图像传感器架构,该架构利用与常规Si光电二极管相结合的纳米级非晶In-Ga-Zn-O(a-IGZO)薄膜晶体管(TFT)。这种方法将克服由于光电二极管的缩小而导致的量子效率和图像质量的损失。尽管制造温度低至200°C,但180nm栅长的a-IGZO TFT仍具有出色的短沟道器件性能,包括低的1 /ƒ噪声和高输出增益。双层栅极电介质(Al 2 O 3 / SiO 2 )和由梯形有源区形成的梯形有源区已经获得了优异的器件性能。量身定制的蚀刻工艺。自对准顶栅结构用于降低寄生电容。应用了3D工艺仿真工具来优化四像素CMOS图像传感器结构。结果证明了我们的堆叠式混合设备方法如何为图像传感器架构中的新设备策略做出贡献。我们希望这种方法适用于未来的微电子和纳米电子学中的众多设备和系统。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号