A high speed low power modified latch type static sense amplifier design for current sensing in non-volatile memories is presented in this paper. The idea presented in this paper makes use of the fact that the scaling in technology introduces severe reliability issues in sensing circuits, due to device mismatches, which cause unpredictability in their performance metrics. In this paper, a detailed analysis on the proposed sense amplifier topology has been carried out by introducing variations in the threshold voltage of the devices to determine its impact on the performance metrics such as sensing delay, offset, and power. The proposed sense amplifier exhibits a worst case sensing delay of 0.946ns and allows operation at power supplies lower than 1.2V. This design is capable of working at a current offset of 1μA, consumes total power of 45.512μW at 27°C with an improvement of 32.6% in power consumption when compared to conventional designs.
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