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Latch-type sense amplifier for a non-volatile memory with reduced margin between supply voltage and bitline-selection voltage
Latch-type sense amplifier for a non-volatile memory with reduced margin between supply voltage and bitline-selection voltage
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机译:用于非易失性存储器的锁存型读出放大器,电源电压和位线选择电压之间的余量降低
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摘要
A sense amplifier and a method for accessing a memory device are disclosed. In an embodiment a sense amplifier for a memory device includes a first input node selectively coupled to a first memory cell through a first local bitline and a first main bitline, a second input node selectively coupled through a second local bitline and a second main bitline to a second memory cell or to a reference generator configured to generate a reference current, a first current generator controllable so as to inject a first variable current into the first input node, a second current generator controllable so as to inject a second variable current into the second input node, a first branch coupled to the first input node and comprising a first switch circuit, a first sense transistor and a first forcing transistor and a second branch coupled to the second input node and including a second switch circuit, a second sense transistor and a second forcing transistor.
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