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Design of Micro-sensors for Measuring Localised Stresses during Fan-Out Wafer Level Packaging (FOWLP) Processes

机译:用于测量扇出晶圆级包装(FOWLP)过程中局部应力测量的微传感器的设计

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Though an understanding on the development of stresses in Si devices after chip level packaging processes has been investigated in previous studies, little is known about the development of stresses after wafer level packaging processes. In this paper, the micro-stress sensors have been designed, for experimental purpose, with which detailed stress can be measured after FOWLP processes including mold-lst FOWLP process and RDL-1st FOWLP process. The advantages of these stress data are: (1) serve as a basis for process selection to meet the trends and needs of a reliable package, and for the development and improvement of existing processes; and (2) are important to enhance survivability during wafer process, thin-wafer handling and packaging.
机译:虽然在先前的研究中研究了在芯片级包装过程之后对SI器件中的应力的发展的理解,但是关于晶片水平包装工艺后应力的发展很少。在本文中,微应力传感器已经设计,用于实验目的,在包括MOLD-L的家禽工艺中可以测量详细的应力 st Fowlp流程和RDL-1ST FOWLP过程。这些压力数据的优点是:(1)作为过程选择的基础,以满足可靠包的趋势和需求,以及用于开发和改进现有流程; (2)对于在晶片过程中提高生存能力,薄晶片处理和包装是重要的。

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