首页> 外文会议>27th Annual IEEE Semiconductor Thermal Measurement and Management Symposium >Angle-of-attack investigation of pin-fin arrays in nonuniform heat-removal cavities for interlayer cooled chip stacks
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Angle-of-attack investigation of pin-fin arrays in nonuniform heat-removal cavities for interlayer cooled chip stacks

机译:层间冷却芯片堆叠非均匀散热腔中针鳍阵列的攻角研究

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Interlayer cooling removes the heat dissipated by vertically stacked chips in multiple integrated fluid cavities. Its performance scales with the number of dies in the stack and is therefore superior to traditional back-side heat removal. Previous work indicated that pin-fin arrays are ideally suited as through-silicon-via-compatible heat transfer structures. In addition, four-port fluid-delivery and fluid-guiding structures improve the heat-removal performance for the nonuniform power maps of high-performance microprocessor chip stacks. Accordingly, an extension of the porous-media multi-scale modeling approach is presented as an efficient approach for designing nonuniform heat transfer cavities. A tensor description in combination with a look-up table is proposed to physically describe periodic porous media, such as pin-fin arrays, in detail. Conjugate heat and mass transfer sub-domain modeling is performed with periodic boundary conditions to derive the orientation-dependent permeability and angle offset between the pressure gradient and the Darcy velocity direction for pin-fin arrays with a pin diameter of 50 μm and pitch and height of 100 μm. A local permeability minimum at a flow direction of approx. 30° could be identified. At higher velocities, the fluid flow is biased towards the symmetry lines of the pin-fin array. The modeling concept was validated with experimental readings of a nonuniform, double-side-heated single test cavity. The main characteristics of the temperature field with respect to the four-port architecture, the guiding structures, the fluid temperature increase, and the nonuniform power dissipation are predicted correctly. A statistical comparison of power maps with different heat transfer contrast values resulted in a mean accuracy <6% at a maximal standard deviation of 22.2%. Finally, the potential of the four-port architecture for nonuniform power maps with hot spots in the corners was demonstrated.
机译:层间冷却可消除多个集成流体腔中垂直堆叠的芯片所散发的热量。它的性能随堆叠中裸片的数量而定,因此优于传统的背面排热。先前的工作表明,针鳍式阵列非常适合用作硅通孔兼容的传热结构。另外,四端口流体输送和导流结构改善了高性能微处理器芯片堆栈不均匀功率分布的散热性能。因此,提出了多孔介质多尺度建模方法的扩展,作为设计非均匀传热腔的有效方法。建议结合张量表的张量描述以物理方式详细描述周期性的多孔介质,例如针翅阵列。在周期性边界条件下进行共轭传热和传质子域建模,以得出销钉直径为50μm且销距和高度的销钉-翅片阵列在压力梯度和达西速度方向之间的定向相关渗透率和角度偏移100μm。大约在流动方向上的局部渗透率最小值。可以确定30°。在较高的速度下,流体流偏向销-翅片阵列的对称线。通过非均匀,双面加热的单测试腔的实验读数验证了建模概念。正确地预测了关于四端口结构,引导结构,流体温度升高以及功率消耗不均匀的温度场的主要特征。具有不同传热对比值的功率图的统计比较导致平均准确度<6%,最大标准偏差为22.2%。最后,演示了四端口架构在拐角处带有热点的非均匀功率图的潜力。

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