A NOVEL APPROACH FOR DUAL DAMASCENE TRENCH ETCH FOR 90nm LOW-K INTERCONNECT WITH NO MIDDLE ETCH STOP LAYER

摘要

In this paper, a novel dual damascene (DD) trench etch process on 90nm no middle etch stop layer (ESL) low-k inter-metal dielectric stack is discussed. A via first DD scheme and via-fill and etch back process flow are combined to get a relative uniform BARC layer across the wafer and facilitate the subsequent etch process. A designed etch chemistry and a unique via-filling material recess step are applied together on eMAX chamber (Applied Materials) to obtain the desired profile which is free of defects such as fence or via comer chopping. It's essential for excellent trench depth control as well. An in-situ interferometric system, iRM, is used on eMAX (Applied Materials) to control the etch time to achieve the preset depth thus reduces the depth variation. Good electrical results with up to four-layer metal via chain resistance and meander continuity are shown to confirm the feasibility of this scheme.