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Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics
Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics
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机译:低k电介质双镶嵌图案的沟槽蚀刻中的缺陷和蚀刻速率控制
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摘要
A dual damascene process for low-k or ultra low-k dielectric such as organo-silicate glass (OSG). After the via (112) etch, a trench (121) is etched in the OSG layer (108) using a less-polymerizing fluorocarbon added to an etch chemistry comprising a fluorocarbon and low N2/Ar ratio. The low N2/Ar ratio controls ridge formation during the trench etch. The combination of a less-polymerizing fluorocarbon with a higher-polymerizing fluorocarbon achieves a high etch rate and defect-free conditions.
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