首页> 外文会议>International Conference on Solid-State and Integrated Circuit Technology(ICSICT-2006); 20061023-26; Shanghai(CN) >Device Physics and Design Theory of Si, Ge and Si_(1-x)Ge_x Vertical Dual Carrier Field Effect Transistor Integrated Circuits on Insulator with Effective Channel Length of 5-18nm
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Device Physics and Design Theory of Si, Ge and Si_(1-x)Ge_x Vertical Dual Carrier Field Effect Transistor Integrated Circuits on Insulator with Effective Channel Length of 5-18nm

机译:绝缘体上有效沟道长度为5-18nm的Si,Ge和Si_(1-x)Ge_x垂直双载流子场效应晶体管集成电路的器件物理和设计理论

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摘要

Device physics and design theory of Si, Ge, and Si_(1-x)Ge_x "Complementary Vertical Dual Carrier Field Effect Transistor" (CVDCFET) integrated circuits on insulator for high speed switching and high frequency mixed signal application are studied and compared. The transistor scaling projections of CVDCFET are presented and compared with the scaling projections of CMOS as given in the 2005 edition of ITRS.
机译:研究和比较了绝缘子上用于高速开关和高频混合信号应用的Si,Ge和Si_(1-x)Ge_x“互补垂直双载流子场效应晶体管”(CVDCFET)集成电路的器件物理特性和设计理论。提出了CVDCFET的晶体管比例投影,并将其与2005年版ITRS中给出的CMOS比例投影进行比较。

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