Implementation and comparison of VLSI architectures of 16 bit carry select adder using Brent Kung adder

摘要

Carry Select Adder is one of the important adders used for arithmetic operations. It is a high speed adder used in VLSI architectures but at the expense of area and power. In this paper several VLSI architectures of carry select adder using Brent Kung adder are presented. The experiments are carried out and the simulation is done using XILINX 12.2. The proposed work shows that 16 bit carry select adder using Brent Kung adder has less chip area with slightly more delay and it is more efficient high speed adder among other architectures of CSLAs.