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Nano imprint Template Fabrication using wafer pattern for sub-30nm

机译:使用低于30nm的晶圆图案制作纳米压印模板

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摘要

Patterning of sub-30 nm features using high resolution nano-imprint lithography (NIL) requires use of quartz templates. To this end, various fabrication methods such as e-beam lithography, edge lithography, and focused ion beam lithography were employed for the template formation [1-3]. Despite significant advances using these methods, NIL template formation process suffers from low throughput and high cost of fabrication when compared with the fabrication of masks used in optical lithography. This is largely owing to a 4X difference in feature sizes involved for the fabrication of NIL template and optical lithography mask. In this paper, we report on a simple, cost-effective method for the fabrication of sub-30 nm NIL templates. Typical fabrication-time required for the formation of sub-30 nm HP templates using conventional Gaussian beam electron beam lithography, runs into several days. Additionally, complicated etch procedures must be employed for pattern transfer onto quartz substrates. Here we propose a low cost, simplified fabrication process for the formation of high resolution NIL templates using wafer pattern replication. We fabricated sub-30nmHP poly-silicon lines and spaces on silicon wafer using multiple patterning technique. These patterns were subsequently transferred onto quartz substrates using NIL technique.rnSeveral types of features were studied to realize a template using the triple patterning technique described above. Results of wafer printing using the said template will be discussed.
机译:使用高分辨率纳米压印光刻(NIL)对30 nm以下的特征进行图案化需要使用石英模板。为此,模板制作采用了各种制造方法,如电子束光刻,边缘光刻和聚焦离子束光刻[1-3]。尽管使用这些方法取得了重大进展,但与光学光刻中使用的掩模制造相比,NIL模板形成工艺的生产率低且制造成本高。这主要是由于NIL模板和光学光刻掩模的制造所涉及的特征尺寸的4倍差异。在本文中,我们报告了一种用于制造30 nm以下NIL模板的简单,经济高效的方法。使用常规的高斯束电子束光刻技术形成30 nm以下的HP模板所需的典型制造时间长达数天。另外,必须采用复杂的蚀刻程序才能将图案转移到石英基板上。在这里,我们提出了一种低成本,简化的制造工艺,用于使用晶圆图案复制形成高分辨率的NIL模板。我们使用多种构图技术在硅晶片上制造了低于30nmHP的多晶硅线和间隔。随后使用NIL技术将这些图案转移到石英基板上。研究了几种类型的特征以使用上述三重图案化技术实现模板。将讨论使用所述模板的晶片印刷的结果。

著录项

  • 来源
    《Alternative lithographic technologies II》|2010年|P.76371R.1-76371R.7|共7页
  • 会议地点 San Jose CA(US)
  • 作者单位

    Semiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea School of Electrical Eng., Korea Univ., Anam, Seongbuk, Seoul 136-701, Korea;

    rnSemiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea;

    rnSemiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea;

    rnSemiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea;

    rnSemiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea;

    rnSemiconductor RD Center, Samsung Electronics Co., Ltd., San#16, Banwol-Dong, Hwasung-City, Gyeonggi-Do, 445-701 Korea;

  • 会议组织
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 微电子学、集成电路(IC);
  • 关键词

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