Dept. of Mech. Eng., Chung Yuan Christian Univ., Taoyuan, Taiwan;
finite element analysis; reliability; three-dimensional integrated circuits; wafer level packaging; 3D nonlinear finite element analysis; 3D-IC module; assembled stacked module; chip grinding; chip thinning; failure estimation; mechanical reliability; packaging vehicle; pre-molding technology; ultra-thin chips stacking; wafer handling; Assembly; Packaging; Reliability; Silicon; Stacking; Three-dimensional displays; Through-silicon vias;
机译:具有超薄芯片堆叠的三维集成电路集成的组装技术开发和故障分析
机译:超薄芯片堆叠技术中具有多个热源的快速非线性动态紧凑热建模
机译:紧凑动态建模,可快速模拟超薄芯片堆叠技术中的非线性导热
机译:通过使用预成型技术制造,组装,用于超薄芯片堆叠的故障估计
机译:3D堆叠芯片新兴技术的热感知优化
机译:晶圆级底部填充对热循环测试过程中超薄芯片堆叠式3D-IC组件微凸点可靠性的影响
机译:采用光可定义聚酰亚胺和封装对称性的3D堆叠超薄芯片封装的高产量制造工艺
机译:用于asIC认证的测试芯片。测试芯片和制造运行N06J结果。 HIRIs数据压缩器芯片。标准单元和sEU sRam芯片结果