Hardware Managers with File System Support for Faster Dynamic Partial Reconfiguration

摘要

FPGA-based platforms allow implementing reconfigurable systems that can change functionality of portions of hardware at runtime. For this purpose, non-volatile, off-chip storage is required to hold the partial-configuration bitstreams that will be used for reconfiguration. Accessing such devices requires a high CPU usage or a dedicated hardware such as a Direct Memory Access (DMA) module, especially when reading from mass storage units using file systems. Relieving the processor from bitstreams acquisition and reconfiguration control promotes parallelism and better task scheduling. This paper presents a dedicated Intellectual Property (IP) block which efficiently retrieves bitstreams from a FAT16 formatted memory and independently performs partial reconfiguration at the highest possible speed. Three versions of the same module are proposed to enable the creation of systems capable of accessing the memory with different protocols and control units. The evaluation results show the advantages of our approach in terms of reconfiguration and reading speed, reduced area overhead, flexibility and ease of use.