首页> 外文会议>2014 4th IEEE International Workshop on Low Temperature Bonding for 3D Integration >Surface-tension driven self-assembly for VCSEL chip bonding to achieve 3D and hetero integration
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Surface-tension driven self-assembly for VCSEL chip bonding to achieve 3D and hetero integration

机译:用于VCSEL芯片键合的表面张力驱动自组装,可实现3D和异质集成

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摘要

Self-assembly with liquid surface tension was applied to tiny chips that were difficult to manipulate. Dummy chips that mimics VCSEL were aligned toward hydrophilic sites surrounding a hydrophobic area on an Si interposer. The alignment accuracies were 0 and −2.0 µm in X and Y directions.
机译:具有液体表面张力的自组装被应用于难以操纵的微小芯片。将模拟VCSEL的虚拟芯片对准Si中介层上疏水区域周围的亲水位点。 X和Y方向的对准精度为0和-2.0 µm。

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