Provides a flip-flop circuit.A driving circuit is also provided.A flip-flop circuit having first to fifth input terminals and first to third output terminals, a first input terminal is supplied with a first trigger signal, a second input terminal is supplied with a second trigger signal, and a third input terminal is supplied with a batch select signal; A fourth input terminal is supplied with a first pulse width modulated signal and a fifth input terminal is supplied with a second pulse width modulated signal.In the period from the first trigger signal to the second trigger signal until the first trigger terminal is suppliedBased on a first pulse width modulation signalA first selection signal is provided andThe first output terminal is supplied with a batch selection signalA first selection signal is provided andIn the period from the first trigger signal to the second trigger signal until the second trigger signal is suppliedBased on a second pulse width modulation signalA second selection signal is provided andThe third output terminal isA third trigger signal is provided.
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