Ferroelectric memory device including series-connected select gate transistors and method of forming the same

摘要

The ferroelectric memory unit cell includes a ferroelectric memory transistor and a series connection of select gate transistors that turn on and off the ferroelectric memory unit cell. Data is stored in the ferroelectric material layer of the ferroelectric memory transistor. The ferroelectric memory unit cell may be of a planar structure, wherein both transistors are planar transistors with horizontal current directions. In this case, the gate electrode of the access transistor may be formed as a buried conductive line. Alternatively, the ferroelectric memory unit cell may comprise a vertical stack of vertical semiconductor channels.