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Process for producing MOS transistors having shallow source/drain zones, self-aligning polysilicon contacts and short channel lengths

机译:具有浅源极/漏极区,自对准多晶硅触点和短沟道长度的MOS晶体管的生产工艺

摘要

In a process for producing MOS transistors having shallow source/drain zones (7, 8), self-aligning polysilicon contacts (3, 4 and 12) and short channel lengths, the source/drain zones (7, 8) are produced by outdiffusion from a structure which is composed of a doped polysilicon layer (3, 4) and which subsequently acts as contact connection. The gate electrodes (12), which are composed of polysilicon, are produced in such a way that they overlap the diffused peripheral areas (17, 18) of the source/drain zones (7, 8). The process is used to produce MOS and CMOS circuits in the sub- mu m range. IMAGE
机译:在生产具有浅源极/漏极区(7、8),自对准多晶硅触点(3、4和12)和短沟道长度的MOS晶体管的过程中,通过外扩散来产生源极/漏极区(7、8)。由一种由掺杂的多晶硅层(3、4)组成的结构制成,并且随后用作接触连接。由多晶硅构成的栅电极(12)以使得它们与源/漏区(7、8)的扩散的外围区域(17、18)重叠的方式被制造。该工艺用于生产亚微米范围内的MOS和CMOS电路。 <图像>

著录项

  • 公开/公告号DE3243125A1

    专利类型

  • 公开/公告日1984-05-24

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE19823243125

  • 发明设计人 WERNERCHRISTOPHDR.;WIEDERARMINDR.;

    申请日1982-11-22

  • 分类号H01L21/18;H01L21/72;H01L27/04;H01L29/78;

  • 国家 DE

  • 入库时间 2022-08-22 08:48:43

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