MANUFACTURE OF HORIZONTAL PNP TRANSISTOR IN BIPOLAR-CMOS SEMICONDUCTOR DEVICE

摘要

PURPOSE:To manufacture a highly efficient horizontal pnp transistor having an optimum concentration and a depth in each base, collector and emitter region easily at a high cost performance by forming the horizontal pnp transistor by the use of each partial manufacturing process of a vertical npn transistor as well as a CMOS transistor together with that of the horizontal pnp transistor. CONSTITUTION:An n+ type highly concentrated buried layer 2 and a p+ type buried layer 8 are formed on a p+ type substrate 1 after diffusing the above layers and then, an n- type epitaxial layer 3 is allowed to grow. Ion implantation is performed one after another for an n+ type highly concentrated diffusion layer 5, an n-type well layer 4, and a p-type well layer 9 which make up a part raising a CN ratio and these layers are extended and are diffused to form respective layers. In such a case, the n-type well layer 4 causes a base region to be formed at a concentration: 1-6X1016cm-3. Then isolation between elements is obtained by forming oxide films 10. Overlapping at least 1mum or more is just made between the above film 10 and the n-type well layer 4 which makes up the base region. Subsequently, a p+ type diffusion layer 6 which makes up a collector region of a horizontal pnp transistor as well as a base region of vertical npn transistor is formed so that its layer 6 in the collector region is located to be deeper than emitter region and has a concentration lower than that of the emitter region.