Improvement of electrostatic capacity using latch voltage of NPN transistor LATERAL PNP TRANSISTOR

摘要

The lateral PNP transistor for using the latch voltage of an NPN transistor to protect the transistor against the static electricity comprises an N-plus buried layer (11) and a n-minus epitaxial layer (12) formed on a P substrate (10), a P-plus isolation layer (16) for isolating between devices, an emitter (13) and a collector (14) formed by diffusing P impurities into the layer (12), a base (15) formed by diffusing n-plus impurities into the layer (12), an N-plus diffusion layer (20,21) formed into the emitter or collector, and emitter, collector and base electrodes (13',14',15'). The breakdown voltage of the PNP transistor is dependent upon the blocking voltage (collector to emitter) of the NPN transistor.