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BANDWIDTH CONTROL CIRCUIT OF PHASE LOCKED LOOP
BANDWIDTH CONTROL CIRCUIT OF PHASE LOCKED LOOP
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机译:锁相环的带宽控制电路
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摘要
Control signals for switching the bandwidth of a filter in a phase locked loop are provided by comparator circuits having time delays at their inputs that vary as a function of the magnitude of changes in the outputs from a phase comparator. These variable time delays permit the comparator circuits to produce an output having a duration of the proper length in order to permit the filter to have a large bandwidth for a long enough time to permit the phase locked loop to become locked.
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