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REDUNDANCY FUSE READING CIRCUIT FOR INTEGRATED MEMORY.

机译:用于集成存储器的冗余保险丝阅读电路。

摘要

P The invention relates to integrated circuit memories, and more particularly those which include redundancy circuits with fuse batteries for storing the address of defective memory elements to be replaced by redundancy elements. BR/ The circuit used to read the state of the fuse * (TGF) comprises a current-voltage converter constituted by an inverter (I1) and a transistor (T1). To avoid an uncertainty on the reading of the state of the fuse when it is an open circuit, when the circuit is re-energized, and to avoid a re-energizing circuit, two additional inverters are used (I3 and I4) in series between the output of the first inverter and the gate of the loopback transistor (T1). These inverters each comprise two very asymmetrical transistors, the asymmetry being exerted in opposite direction for the two inverters. /P
机译:本发明涉及集成电路存储器,更具体地涉及集成电路存储器,其包括具有保险丝电池的冗余电路,用于存储有待由冗余元件代替的有缺陷的存储元件的地址。
用于读取保险丝*(TGF)的状态的电路包括由逆变器(I1)和晶体管(T1)构成的电流-电压转换器。为避免断路时保险丝状态读数的不确定性,为电路重新通电时以及为避免电路重新通电时,在两个保险丝之间串联使用两个额外的逆变器(I3和I4)第一反相器的输出和回送晶体管(T1)的栅极。这些逆变器每个都包括两个非常不对称的晶体管,两个逆变器的不对称性沿相反的方向施加。

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