首页>
外国专利>
REDUNDANCY FUSE READING CIRCUIT FOR INTEGRATED MEMORY.
REDUNDANCY FUSE READING CIRCUIT FOR INTEGRATED MEMORY.
展开▼
机译:用于集成存储器的冗余保险丝阅读电路。
展开▼
页面导航
摘要
著录项
相似文献
摘要
P The invention relates to integrated circuit memories, and more particularly those which include redundancy circuits with fuse batteries for storing the address of defective memory elements to be replaced by redundancy elements. BR/ The circuit used to read the state of the fuse * (TGF) comprises a current-voltage converter constituted by an inverter (I1) and a transistor (T1). To avoid an uncertainty on the reading of the state of the fuse when it is an open circuit, when the circuit is re-energized, and to avoid a re-energizing circuit, two additional inverters are used (I3 and I4) in series between the output of the first inverter and the gate of the loopback transistor (T1). These inverters each comprise two very asymmetrical transistors, the asymmetry being exerted in opposite direction for the two inverters. /P
展开▼