首页> 外国专利> Method for fabricating a semiconductor memory device having a floating gate with improved insulation film quality

Method for fabricating a semiconductor memory device having a floating gate with improved insulation film quality

机译:具有改进的绝缘膜质量的具有浮栅的半导体存储器件的制造方法

摘要

A method for fabricating a flash-EPROM comprises the steps of forming a first gate insulation film and a second gate insulation film on a semiconductor substrate so as to respectively cover first and second device regions, providing a first conductor layer so as to cover both the first device region and the second device region, patterning the first conductor layer to form a floating gate electrode in correspondence to the first device region, oxidizing a surface of the first conductor layer to form a capacitor insulation film surrounding the floating gate electrode, providing a second conductor layer on the first conductor layer as to bury underneath the floating gate electrode covered by the capacitor insulation film, patterning the second conductor layer on the first device region to form a control gate electrode, exposing the first conductor layer in correspondence to the second device region, and patterning the first conductor layer remaining on the second element region to form a gate electrode of a peripheral transistor.
机译:一种用于制造闪存-EPROM的方法,包括以下步骤:在半导体衬底上形成第一栅极绝缘膜和第二栅极绝缘膜,以分别覆盖第一和第二器件区域;提供第一导体层,以覆盖两个第一器件区域和第二器件区域,图案化第一导体层以形成与第一器件区域相对应的浮栅电极,氧化第一导体层的表面以形成围绕浮栅电极的电容器绝缘膜,从而提供第一导体层上的第二导体层掩埋在被电容器绝缘膜覆盖的浮栅电极下面,在第一器件区域上对第二导体层进行构图以形成控制栅电极,使与第二导体层相对应的第一导体层暴露器件区域,并对保留在第二元件区域上的第一导体层进行构图,以形成外围晶体管的栅电极。

著录项

  • 公开/公告号US5449629A

    专利类型

  • 公开/公告日1995-09-12

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号US19920974721

  • 发明设计人 TATSUYA KAJITA;

    申请日1992-11-13

  • 分类号H01L21/265;

  • 国家 US

  • 入库时间 2022-08-22 04:04:25

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号