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Stability verification manner null of the aural masking and the etching process which utilize SEM wave die

机译:利用SEM波片的掩膜和蚀刻工艺的稳定性验证方式无效

摘要

PURPOSE: To reduce a processing time by scanning a thin film in a process with electronic lines through the use of SEM and analyzing a waveform made by the discharge of secondary electrons generated on the surface of a fine pattern. CONSTITUTION: When a foreign matter exists in the bottom area of a thin film, etc., a charge-up phenomenon appearing in general is gradually reduced by SEM measuring technique. Thereby the waveform of the bottom area is raised in spite of reducing the number of primary electrons. Then at the time of making the primary electrons to scan the upper part of a sample, the waveform appearing from the thin film where mutually different matters are adjacent to each other generates the secondary electrons at a part the mutually different matters are adjacent to each other. Consequently a contrast difference appears according to the number of the generated secondary electrons and at the time of comparing this contrast difference by the height of waveforms, the thin film and the presence/absence of the foreign matter is recognized. At the time of making the electronic lines to scan a hole obtained by removing an oxide film layer 7 at the central upper part of a silicon substrate 1, the bottom area starts from the same height as a generation starting area. At the time of making the primary electronics to scan a residual hole at the layer 7 at the upper part of the silicon substrate 1, the bottom area of the measured waveform starts at a height lower than the generation starting area to show that the layer 7 remains. As a silicon wafer can be confirmed as it is without damaging by this, economy, time saving and the precision of a process are improved.
机译:目的:通过在电子线路中使用SEM扫描薄膜并分析由精细图案表面上产生的二次电子的放电所产生的波形,来减少处理时间。组成:当薄膜底部等处存在异物时,通常会通过SEM测量技术逐渐减少带电现象。因此,尽管减少了一次电子的数量,但底部区域的波形却升高了。然后,在使一次电子扫描样品的上部时,从彼此不同的物质彼此相邻的薄膜出现的波形在彼此不同的物质彼此相邻的部分处产生二次电子。 。因此,根据产生的二次电子的数量出现对比度差异,并且在将该对比度差异与波形高度进行比较时,识别出薄膜和异物的存在/不存在。在使电子线扫描通过去除硅基板1的中央上部处的氧化膜层7而获得的孔时,底部区域从与产生起始区域相同的高度开始。在使主要电子器件扫描硅衬底1上部的层7处的残留孔时,测量波形的底部区域从低于生成起始区域的高度开始,表明层7遗迹。由此,可以在不损伤硅晶片的情况下确认其原样,因此经济性,节省时间和加工精度提高。

著录项

  • 公开/公告号JP2537095B2

    专利类型

  • 公开/公告日1996-09-25

    原文格式PDF

  • 申请/专利权人 GENDAI DENSHI SANGYO KK;

    申请/专利号JP19890297237

  • 发明设计人 BOKU ZENU;SON KOSHOKU;

    申请日1989-11-14

  • 分类号H01L21/3065;H01L21/66;

  • 国家 JP

  • 入库时间 2022-08-22 03:58:52

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