Self-aligned POCl3 fabrication method for submicron microelectronics applications using amorphized polysilicon

摘要

In a method of implanting phosphorus into an undoped gate polysilicon region formed as part of an integrated circuit structure, an initial MOS structure is formed, in this case, except that the gate polysilicon remains in the undoped state, RTI ID = 0.0 (LDD) /RTI implantation step. Then, in accordance with the present invention, the dopant is implanted into the source / drain regions to amorphize the undoped gate polysilicon, thereby removing the polysilicon grain boundaries. A CVD oxide layer is then formed and a CMP step is performed to expose the amorphized gate polysilicon region. Then phosphorous oxychloride (POCl RTI ID = 0.0 ₃) Layer is formed on the amorphized gate polysilicon and thermally annealed to form POCl₃Phosphorus is injected into the polysilicon layer from the layer. Then, POCl₃The layer is removed.