Method of fabricating vertical FET with Schottky diode

摘要

A method of fabricating an integrated VFET and Schottky diode including forming a source region on the upper surface of a substrate so as to define a channel. First and second spaced apart gates are formed on opposing sides of the source region so as to abut the channel, thereby forming a channel structure. Schottky metal is positioned on the upper surface of the substrate proximate the channel structure to define a Schottky diode region and form a Schottky diode. A source contact is formed in communication with the source region and the Schottky metal, and a drain contact is formed on the lower surface of the substrate.