DRAM WITH STACKED CAPACITORS AND BURIED WORD LINES

摘要

PURPOSE: A DRAM with stacked capacitors and buried word lines is provided decrease the region competition between capacitors and bit lines or word lines by burying the word lines on the semiconductor chip under a semiconductor substrate. CONSTITUTION: A semiconductor memory cell connected in series with memory capacitors include a semiconductor body(10) of one conduction type. first and second regions of the semiconductor body(10), a trench (12) and a memory capacitor. The first and second regions of the semiconductor body(10) are formed on the semiconductor body(10) and paced by a part of the semiconductor body(10). The first and second region are of a different type from the semiconductor body(10). The trench(12) in the intermediate region between the spaced regions includes a conduction burial and an insulator layer. The memory capacitor is implemented on the semiconductor body(10) including a conduction layer.