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Failure analysis method for chip of ball grid array type semiconductor device

机译:球栅阵列型半导体器件芯片的失效分析方法

摘要

In a failure analysis method for a ball grid array type semiconductor device including a semiconductor chip having pads, first solder balls, an interposer substrate and second solder balls, the second solder balls and the interposer substrate are removed from the semiconductor device, and then, the first solder balls are removed from the semiconductor device. Then, the semiconductor device is mounted on a package, and a wire bonding operation is performed between the pads of the semiconductor chip and bonding pads of the package. Finally, a test operation is performed upon the semiconductor chip by mounting the package on a tester.
机译:在用于球栅阵列型半导体器件的故障分析方法中,该球栅阵列型半导体器件包括具有焊盘,第一焊球,插入基板和第二焊球的半导体芯片,将第二焊球和插入基板从半导体装置中去除,然后,从半导体器件中去除第一焊球。然后,将半导体器件安装在封装上,并且在半导体芯片的焊盘与封装的焊盘之间执行引线键合操作。最后,通过将封装安装在测试仪上来对半导体芯片执行测试操作。

著录项

  • 公开/公告号US6472234B2

    专利类型

  • 公开/公告日2002-10-29

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US20010822368

  • 发明设计人 TADASHI OZAWA;

    申请日2001-04-02

  • 分类号G01R312/60;H01L216/60;

  • 国家 US

  • 入库时间 2022-08-22 00:48:05

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