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Integration of High K Gate Dielectric

机译:高K栅介质的集成

摘要

Abstract of Disclosure;Methods are provided herein for forming electrode layers over high dielectric constant (high k) materials. In the illustrated embodiments, a high k gate dielectric, such as zirconium oxide, is protected from reduction during a subsequent deposition of silicon-containing gate electrode. In particular, a seed deposition phase includes conditions designed for minimizing hydrogen reduction of the gate dielectric, including low hydrogen content, low temperatures and/or low partial pressures of the silicon source gas. Conditions are preferably changed for higher deposition rates and deposition continues in a bulk phase. Desirably, though, hydrogen diffusion is still minimized by controlling the above-noted parameters. In one embodiment, high k dielectric reduction is minimized through omission of a hydrogen carrier gas. In another embodiment, higher order silanes aid in reducing hydrogen content for a given deposition rate.
机译:公开摘要;本文提供了在高介电常数(高k)材料上形成电极层的方法。在所示的实施例中,保护高k栅极电介质,例如氧化锆,在随后的含硅栅电极沉积期间不被还原。特别地,种子沉积阶段包括设计用于最小化栅极电介质的氢还原的条件,包括氢含量低,硅源气体的低温和/或低分压。优选地,为了更高的沉积速率而改变条件,并且在本体相中继续沉积。但是,希望通过控制上述参数仍使氢扩散最小化。在一实施例中,通过省略氢载气将高k介电降低减到最小。在另一个实施方案中,对于给定的沉积速率,高阶硅烷有助于减少氢含量。

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