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Epitaxial silicon growth and usage of epitaxial gate insulator for low power, high performance devices

机译:外延硅的生长以及外延栅绝缘体在低功率,高性能器件中的使用

摘要

A method for reducing off-state leakage current of a MOSFET while promoting the formation of an epitaxial gate insulator layer between the substrate and gate stack includes implanting source/drain dopant into the substrate, and then forming a very thin epitaxial Silicon layer on the substrate by, e.g., molecular beam epitaxy. The high-k gate insulator layer is then deposited on the epitaxial layer, without an interfering native oxide or interfacial oxide being formed between the insulator layer and substrate, while establishing a very steep retrograde dopant profile and hence reducing off-state leakage current through the channel region.
机译:一种用于减小MOSFET的截止态泄漏电流同时促进在衬底和栅叠层之间形成外延栅极绝缘层的方法,包括将源极/漏极掺杂剂注入到衬底中,然后在衬底上形成非常薄的外延硅层。通过例如分子束外延。然后,高k栅极绝缘体层沉积在外延层上,而不会在绝缘体层和衬底之间形成干扰的本征氧化物或界面氧化物,同时建立非常陡峭的逆向掺杂剂分布,从而降低通过硅的关态漏电流。通道区域。

著录项

  • 公开/公告号US6624488B1

    专利类型

  • 公开/公告日2003-09-23

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US20000633576

  • 发明设计人 HYEON-SEAG KIM;

    申请日2000-08-07

  • 分类号H01L297/60;H01L299/40;H01L310/62;H01L311/13;H01L311/19;

  • 国家 US

  • 入库时间 2022-08-22 00:06:15

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