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/ DRAM device memory cell transistor having source/drain junction region of different junction profile connected DC node and BC node and manufacturing method thereof
/ DRAM device memory cell transistor having source/drain junction region of different junction profile connected DC node and BC node and manufacturing method thereof
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机译:于dc节点和bc节点连接有不同结轮廓的源/漏结区的dram装置存储单元晶体管及其制造方法
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摘要
PURPOSE: A memory cell transistor of a DRAM(Dynamic Random Access Memory) device having source/drain junction region of different junction profile connected to DC node and BC node, and manufacturing method thereof are provided to be capable of improving static and dynamic refresh characteristics. CONSTITUTION: A memory cell transistor is provided with a gate stack pattern(60) formed at the upper portion of a semiconductor substrate(50), a DC and BC node formed at both sides of the gate stack pattern on the surface of the semiconductor substrate for being electrically connected with a bit line and a capacitor storage node, and a source/drain region(72a,72b) having a different junction profile, formed in the semiconductor substrate.
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