Methods and structures for preventing gate salicidation and for forming source and drain salicidation and for forming semiconductor device

摘要

Methods and structures for preventing salicidation are disclosed. A substrate has an gate electrode on it. Spacers are on sidewalls of the gate electrode, exposing a top portion of the gate electrode. A dielectric layer is formed above the spacers, covering the exposed top portion of the gate electrode. Methods and structures for forming source and drain salicidation are disclosed. They further salicidize source and drain regions which are adjacent to the spacers without forming salicidation on the gate electrode while salicidizing the source and drain regions. Methods and structures for forming gate electrode salicidation are also disclosed. They further form another dielectric layer covering the salicidized source and drain regions. A portion of the dielectric layer is removed so as to expose a top surface of the gate electrode. The gate electrode is then salicidized.