METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING NOTCHED GATE MOSFET

摘要

The cell transistor formed in the cell array region adopts a notched gate structure transistor capable of multi-bit operation using localized bits while applying a spacer electrode to the gate, and in the peripheral circuit region according to the function of the transistor. Disclosed is a method of manufacturing a semiconductor device for forming a transistor having a structure optimized to satisfy different requirements. In the method of manufacturing a semiconductor device according to the present invention, a notch gate structure, a first channel region formed in a semiconductor substrate under the notched gate structure, and the first channel region are disposed at both sides of a cell array region of the semiconductor substrate. A source / drain region to be formed; a first gate insulating layer formed between the first channel region and the notch gate structure; and a source / drain region between the first channel region and the notch gate structure. A cell transistor including a memory layer locally formed in an adjacent region is formed. A plurality of peripheral circuit transistors including at least one transistor having a structure different from that of the cell transistor are formed in the peripheral circuit region at the same time as the cell transistor formation.;Notch Gate, Multi-Bit, Cell Array, Peripheral, Process Integration, SONOS