首页> 外国专利> Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing p

Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing p

机译:在减小金属间电介质的寄生电容的同时改善接触孔填充特性的半导体器件的制造方法在减小金属间电介质的寄生电容的同时改善接触孔填充特性的半导体器件的制造方法降低金属间介电层的寄生电容的同时降低特性,同时减小p的同时改善接触孔填充特性的半导体器件的制造方法

摘要

In manufacturing a semiconductor device, a metal film is formed on a semiconductor substrate, and a high-temperature amorphous carbon film pattern for defining a wiring forming area is formed on the metal film. The metal film is etched by using the high-temperature amorphous carbon film pattern as an etching barrier to form a metal wiring. A low-temperature amorphous carbon film as an IMD is formed on the resultant structure so as to cover the metal wiring including the high-temperature amorphous carbon film pattern. The low-temperature amorphous carbon film and the high-temperature amorphous carbon film pattern are etched to form a contact hole, which has greater width in an upper portion than in a lower portion thereof. Finally, a plug metal film is formed on the low-temperature amorphous carbon film to fill the contact hole.
机译:在制造半导体器件时,在半导体衬底上形成金属膜,并且在金属膜上形成用于限定布线形成区域的高温非晶碳膜图案。通过使用高温非晶碳膜图案作为蚀刻阻挡层来蚀刻金属膜以形成金属布线。在所得结构上形成作为IMD的低温非晶碳膜,以覆盖包括高温非晶碳膜图案的金属布线。蚀刻低温非晶碳膜和高温非晶碳膜图案以形成接触孔,该接触孔的上部宽度大于下部宽度。最后,在低温非晶碳膜上形成插塞金属膜以填充接触孔。

著录项

  • 公开/公告号US2007037398A1

    专利类型

  • 公开/公告日2007-02-15

    原文格式PDF

  • 申请/专利权人 CHAN BAE KIM;CHAI O. CHUNG;

    申请/专利号US20060498517

  • 发明设计人 CHAN BAE KIM;CHAI O. CHUNG;

    申请日2006-08-03

  • 分类号H01L21/302;H01L21/461;

  • 国家 US

  • 入库时间 2022-08-21 21:05:13

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