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Bias circuit having transistors that selectively provide current that controls generation of bias voltage

机译:具有晶体管的偏置电路,该晶体管选择性地提供控制偏置电压产生的电流

摘要

A bias circuit, which generates a bias voltage, has a first MOS transistor coupled between a first reference voltage terminal and a voltage dividing node and a second MOS transistor coupled in parallel with the first MOS transistor. The first MOS transistor may have a first ON-state resistance, and the second MOS transistor may have a second ON-state resistance which is lower than the first ON-state resistance. Furthermore, the bias circuit has a resistance circuit coupled between the voltage dividing node and a second reference voltage terminal and a voltage generator coupled with the first node. The voltage generator outputs the bias voltage in dependence upon an electrical potential on the voltage dividing node.
机译:产生偏置电压的偏置电路具有耦合在第一参考电压端子和分压节点之间的第一MOS晶体管和与第一MOS晶体管并联耦合的第二MOS晶体管。第一MOS晶体管可以具有第一导通状态电阻,并且第二MOS晶体管可以具有比第一导通状态电阻低的第二导通状态电阻。此外,偏置电路具有耦合在分压节点和第二参考电压端子之间的电阻电路以及与第一节点耦合的电压发生器。电压发生器根据分压节点上的电势输出偏置电压。

著录项

  • 公开/公告号US2007046365A1

    专利类型

  • 公开/公告日2007-03-01

    原文格式PDF

  • 申请/专利权人 SHUICHIRO FUJIMOTO;

    申请/专利号US20060588216

  • 发明设计人 SHUICHIRO FUJIMOTO;

    申请日2006-10-27

  • 分类号G05F1/10;

  • 国家 US

  • 入库时间 2022-08-21 21:03:44

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