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CHARGE RECYCLING OF POWER GATED CMOS CIRCUIT AND SUPER CUTOFF CMOS CIRCUIT

机译:功率门控CMOS电路和超级截止CMOS电路的充电循环

摘要

PPROBLEM TO BE SOLVED: To reduce the power consumption in mode transition of a power-gated circuit such as an MTCOMS circuit and an SCCMOS circuit, to shorten a wake-up time, and to reduce noise resulting from a power gating configuration. PSOLUTION: The circuit has: a first virtual ground node between a first circuit block and a first sleep transistor; a second virtual ground node between a second circuit block and a second sleep transistor; and a transmission gate (TG) or pass transistor making possible charge recycling between the first circuit block and the second circuit block during change from an active mode to a sleep mode by the first circuit block, or change from the sleep mode to the active mode by the second circuit block or reverse change thereof while the first virtual ground node is connected to the second virtual ground node. PCOPYRIGHT: (C)2009,JPO&INPIT
机译:

要解决的问题:减少门控电路(例如MTCOMS电路和SCCMOS电路)的模式转换时的功耗,缩短唤醒时间,并减少由门控配置引起的噪声。

解决方案:该电路具有:第一虚拟接地节点,位于第一电路块和第一睡眠晶体管之间;以及在第二电路块和第二睡眠晶体管之间的第二虚拟接地节点;传输门(TG)或传输晶体管,使得在第一电路模块从活动模式改变为睡眠模式或从睡眠模式改变为活动模式期间,第一电路块和第二电路块之间的电荷再循环成为可能在第一虚拟接地节点连接到第二虚拟接地节点的同时,通过第二电路块对其进行反向改变。

版权:(C)2009,日本特许厅&INPIT

著录项

  • 公开/公告号JP2009147933A

    专利类型

  • 公开/公告日2009-07-02

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20080315276

  • 申请日2008-12-11

  • 分类号H03K19/0948;H01L21/822;H01L27/04;

  • 国家 JP

  • 入库时间 2022-08-21 19:43:04

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