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CHARGE RECYCLING IN POWER-GATED CMOS CIRCUIT AND IN SUPER CUTOFF CMOS CIRCUIT

机译:功率CMOS电路和超级截止CMOS电路中的电荷回收

摘要

PROBLEM TO BE SOLVED: To reduce power consumption during mode transition in power-gated circuits such as MTCMOS circuits and SCCMOS circuits, and reduce wakeup time and noise generated by the power gating structure.SOLUTION: The circuit includes: a first virtual ground node between a first circuit block and a first sleep transistor; a second virtual ground node between a second circuit block and a second sleep transistor; and a transmission gate (TG) or a pass transistor connecting the first virtual ground node to the second virtual ground node to enable charge recycling between the first circuit block and the second circuit block during transitions by the first circuit block from active mode to sleep mode and the second circuit block from sleep mode to active mode or vice versa.
机译:解决的问题:减少电源门控电路(例如MTCMOS电路和SCCMOS电路)在模式转换期间的功耗,并减少电源门控结构产生的唤醒时间和噪声解决方案:该电路包括:第一个虚拟接地节点位于第一电路块和第一睡眠晶体管;在第二电路块和第二睡眠晶体管之间的第二虚拟接地节点;传输门(TG)或传输晶体管,其将第一虚拟接地节点连接到第二虚拟接地节点,以在第一电路块从活动模式转换到睡眠模式期间实现第一电路块和第二电路块之间的电荷再循环第二电路模块从睡眠模式转换为活动模式,反之亦然。

著录项

  • 公开/公告号JP2012095358A

    专利类型

  • 公开/公告日2012-05-17

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP20120022351

  • 申请日2012-02-03

  • 分类号H03K19/0948;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-21 17:43:28

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