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METAL GATE STACK AND SEMICONDUCTOR GATE STACK FOR CMOS DEVICES

机译:CMOS器件的金属栅极堆叠和半导体栅极堆叠

摘要

A semiconductor gate stack comprising a silicon oxide based gate dielectric and a doped semiconductor material is formed on a semiconductor substrate. A high-k material metal gate electrode comprising a high-k gate dielectric and a metal gate portion is also formed on the semiconductor substrate. Oxygen-impermeable dielectric spacers are formed on the sidewalls of the semiconductor gate stack and the high-k material metal gate stack. The oxygen-impermeable dielectric spacer on the semiconductor gate stack is removed, while the oxygen impermeable dielectric spacer on the high-k material metal gate electrode is preserved. A low-k dielectric spacer is formed on the semiconductor gate stack, which provides a low parasitic capacitance for the device employing the semiconductor gate stack.
机译:在半导体衬底上形成包括基于氧化硅的栅极电介质和掺杂的半导体材料的半导体栅极叠层。包括高k栅极电介质和金属栅极部分的高k材料金属栅电极也形成在半导体衬底上。在半导体栅叠层和高k材料金属栅叠层的侧壁上形成不透氧的介电间隔物。去除了半导体栅叠层上的不透氧的介电隔离物,同时保留了高k材料金属栅电极上的不透氧的介电隔离物。低k介电间隔物形成在半导体栅叠层上,这为采用半导体栅叠层的器件提供了低寄生电容。

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