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Semiconductor package-on-package (POP) device avoiding crack at solder joints of micro contacts during package stacking

机译:半导体叠层封装(POP)器件可避免在封装堆叠过程中微触点的焊点出现裂纹

摘要

A stacked semiconductor device primarily comprises semiconductor packages with a plurality of micro contacts and solder paste to soldering the micro contacts. Each semiconductor package comprises a substrate and a chip disposed on the substrate. The micro contacts of the bottom semiconductor package are a plurality of top bumps located on the upper surface of the substrate. The micro contacts of the top semiconductor package are a plurality of bottom bumps located on the lower surface of the substrate. The bottom bumps are aligned with the top bumps and are electrically connected each other by the solder paste. Therefore, the top bumps and the bottom bumps have the same soldering shapes and dimensions for evenly soldering to avoid breakages of the micro bumps during stacking.
机译:堆叠的半导体器件主要包括具有多个微触点的半导体封装和用于焊接微触点的焊膏。每个半导体封装包括衬底和设置在衬底上的芯片。底部半导体封装的微触点是位于衬底的上表面上的多个顶部凸块。顶部半导体封装的微触点是位于衬底的下表面上的多个底部凸块。底部凸块与顶部凸块对准并且通过焊膏彼此电连接。因此,顶部凸块和底部凸块具有相同的焊接形状和尺寸,以进行均匀焊接,以避免在堆叠过程中微凸块的破裂。

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