Design manner of semiconductor integrated circuit and semiconductor integrated circuit, and tip/chip circumference wiring of program null flip chip

摘要

PROBLEM TO BE SOLVED: To lower the upper/lower side inner region and the right/left side inner region of a semiconductor chip in wiring resistance than usual and to make areas located at a symmetrical position in the upper/lower part and the right/left part of the chip equivalent in wiring resistance to each other.;SOLUTION: The sides of the chip extending in a first direction are considered as the upper/lower side of the chip, and the sides of the chip extending in a second direction (e. g. a vertical direction) intersecting the first direction are considered as the right/left side. In a flip chip where the inner VDD pads and GND pads of the chip are symmetrically arranged as viewed from the upper/lower side and the right/left side of the chip, a first layer (uppermost layer) interconnect line and a second layer interconnect line as the inner power supply interconnect lines of the chip are laid symmetrically and equally distant from the upper/lower side and the right/left side of the chip. At this point, the first layer interconnect line is set perpendicular to the second layer interconnect line. The first layer interconnect line and the second layer interconnect line are connected together through Via at intersections.;COPYRIGHT: (C)2006,JPO&NCIPI