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Linear Gate Level Cross-Coupled Transistor Device with Overlapping PMOS Transistors and Non-Overlapping NMOS Transistors Relative to Direction of Gate Electrodes
Linear Gate Level Cross-Coupled Transistor Device with Overlapping PMOS Transistors and Non-Overlapping NMOS Transistors Relative to Direction of Gate Electrodes
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机译:相对于栅电极方向具有重叠PMOS晶体管和非重叠NMOS晶体管的线性栅极电平交叉耦合晶体管器件
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摘要
A semiconductor device includes a cross-coupled transistor configuration formed by first and second PMOS transistors defined over first and second p-type diffusion regions, and by first and second NMOS transistors defined over first and second n-type diffusion regions, with each diffusion region electrically connected to a common node. Gate electrodes of the PMOS and NMOS transistors are formed by conductive features which extend in only a first parallel direction. At least a portion of each of the first and second p-type diffusion regions are formed over a first common line of extent that extends perpendicular to the first parallel direction. The first and second n-type diffusion regions are formed in a spaced apart manner relative to the first parallel direction, such that no single line of extent that extends across the substrate perpendicular to the first parallel direction intersects both the first and second n-type diffusion regions.
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