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Method of fabricating a metal gate CMOS with at least a single gate metal and dual gate dielectrics
Method of fabricating a metal gate CMOS with at least a single gate metal and dual gate dielectrics
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机译:具有至少单栅金属和双栅电介质的金属栅CMOS的制造方法
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摘要
A method of fabricating a complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the present invention, the nFET and the pFET both include at least a single gate metal and the nFET gate stack is engineered to have a gate dielectric stack having no net negative charge and the pFET gate stack is engineered to have a gate dielectric stack having no net positive charge. In particularly, the present invention provides a method of fabricating a CMOS structure in which the nFET gate stack is engineered to include a band edge workfunction and the pFET gate stack is engineered to have a ¼ gap workfunction.
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