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Integration of Dual Metal Gate CMOS on High-k Dielectrics Utilizing a Metal Wet Etch Process

机译:利用金属湿蚀刻工艺在高k电介质上集成双金属栅CMOS

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The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO2 dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TIN, and TaN) have been developed with a minimal impact on HfO_2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.
机译:报道了在HfO2电介质上具有TaSiN和Ru栅电极的双金属栅互补金属氧化物半导体(CMOS)的工艺模块开发和器件特性。已经开发了对各种金属栅极材料(TaSiN,TIN和TaN)的高选择性湿法蚀刻工艺,并且对HfO_2和HfSiON的影响最小。开发了等离子体蚀刻工艺以在同一晶片上同时蚀刻TaSiN和Ru双金属栅叠层。已经证明了栅极长度低至85 nm的性能良好的双金属栅极CMOS晶体管。这种集成方法用途广泛,可以应用于各种金属栅极材料。

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